A 4.9mW 270MHz CMOS Frequency SynthesizerIFSK Modulator
نویسندگان
چکیده
Ab.mncr A 270hlHz frequency syntheuimrIFSK modulator for low-rate WPAN iu implemented. It consumes only 4.9mW adopting current re-using technique, self-DC biasing rcheme, and appropriate divider architecture. The 3'*-urder feedback l ~ p e DSM and the high performance charge pump are deigned for wide loop bandwidth, which enables lo design a low p w r r and low noise frequency syntherirer. The implemented prototype offers 500kHz-loop bandwidth and -IO4dBrlHz in-band noise. It also plays a role as il FSK modulator which shows only 1.1 dB degradation at IO-' symbol BERrompared with the ideal FSK-modulator.
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